The present invention relates to a quartz oscillator using an inverter in CMOS technology, and more specifically to a low consumption oscillator.
FIG. 1 shows such an oscillator that includes an inverter 8 formed of a P-channel MOS transistor MP1 and of an N-channel MOS transistor MN1, series connected between a high supply potential Vdd and a low supply potential GND. The gates of transistors MP1 and MN1 are interconnected and form input A of the inverter. Output B of the inverter, which is also the output of the oscillator, is sampled from the drains of transistors MP1 and MN1. A quartz crystal 10 is connected in parallel with a resistor 12 between the input and the output of inverter 8. Further, two capacitors 14 and 16 respectively connect the input and the output of inverter 8 to low supply potential GND.
Such an oscillator consumes a power proportional to the oscillation frequency, this consumption being essentially due to the simultaneous conduction of transistors MP1 and MN1 upon transitions of the output signal.
FIG. 2 shows a solution currently used to reduce the consumption of an oscillator of the type in FIG. 1. Transistors MP1 and MN1, instead of being directly connected to potentials Vdd and GND, are connected to these potentials via respective resistors 18 and 20.
With this configuration, the switching currents of inverter 8 are decreased proportionally to the value of resistors 18 and 20. However, the amplitude of the output signal decreases all the more as resistors 18 and 20 have high values. This amplitude decrease does not affect the oscillator operation, but an amplifier 22 however has to be provided to bring the peak levels of the oscillator""s signal back to levels close to the supply potentials to generate an exploitable logic signal.
Accessorily, capacitors 24 and 25 are connected in parallel with resistors 18 and 20, which provides a smoothing of the voltage across transistors MP1 and MN1 and a decrease of the dynamic output impedance of the inverter.
Resistors 18 and 20 can be chosen with particularly high values without affecting the oscillator operation. A problem however is the forming of resistors of high value in an integrated circuit. In an integrated circuit, a resistor is formed of a polysilicon track having a length proportional to the value of the resistor. To form resistors of proper value for a low consumption oscillator of the type in FIG. 2, the polysilicon tracks would take up a non-negligible surface area.
The disclosed embodiments of the present invention provide an oscillator with a particularly low power consumption that does not require a resistor occupying a significant surface area.
To achieve the foregoing, the disclosed embodiments of the present invention provide a low power consumption oscillator comprising an inverter connected to a high supply potential and to a low supply potential via two respective resistors. The resistors are formed of capacitors with a strong leakage.
According to an embodiment of the present invention, the oscillator output is connected to an amplifier intended to provide logic levels from the output levels of the oscillator.
According to an embodiment of the present invention, the amplifier includes several stages, each including two transistors connected in series between the high and low supply potentials, the gate of a first transistor of each stage being connected to the output of the preceding stage, and the gates of the second transistors of two consecutive stages being respectively connected to the input and to the output of said inverter.
The foregoing features and advantages of the present invention will be discussed in detail in the following non-limiting description of specific embodiments in connection with the accompanying drawings.